2022-02-03 20:11:55 +00:00
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;***********
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; RST vector
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;***********
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.ifdef C_CODE
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.import _main
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.endif
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RST:
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SEI ; Disable interrupt
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CLD ; Clear/disable decimal
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LDX #$FF ; Initialized stack
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TXS
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INX ; X=0
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STX PPU_CTRL ; Disable NMI
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STX PPU_MASK ; Disable Rendering
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STX APU_DMC_FREQ ; Disable DMC IRQ
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; Wait for the PPU to initialized
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BIT PPU_STATUS ; Clear the VBL flag if it was set at reset time
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@vwait1:
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BIT PPU_STATUS
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BPL @vwait1 ; At this point, about 27384 cycles have passed
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@clrmem:
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LDA #$00
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STA $0000, x
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STA $0100, x
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STA $0200, x
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STA $0300, x
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STA $0400, x
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STA $0500, x
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STA $0600, x
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STA $0700, x
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INX
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BNE @clrmem
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@vwait2:
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BIT PPU_STATUS
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BPL @vwait2 ; At this point, about 57165 cycles have passed
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LDA #%10010000 ; Enable NMI + set background table to $1000
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STA PPU_CTRL
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STA ppu_ctrl_val
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2022-04-01 12:09:46 +00:00
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.if MMC5=1
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; - - - - - - -
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; setup MMC5
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; - - - - - - -
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; set $8000-9FFF to BNK 0
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LDA #$80
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STA MMC5_PRG_BNK0
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; set $A000-BFFF to BNK 1
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LDA #$81
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STA MMC5_PRG_BNK1
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; set $C000-DFFF to BNK 2
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LDA #$82
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STA MMC5_PRG_BNK2
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.endif
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2022-02-03 20:11:55 +00:00
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CLI
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.ifdef C_CODE
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JMP _main
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.else
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JMP MAIN
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.endif
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